Share My Creation CHIP-8 emulator (classic version)

Hi everyone,

Today I'm sharing my CHIP-8 emulator, developed entirely in B4J.
The goal was to create a faithful, simple implementation that is 100% compatible with classic CHIP-8 ROMs.

Main Features
  • Full CHIP-8 compatibility (64×32)
  • Proper handling of all opcodes
  • Hexadecimal keyboard support
  • Functional Delay and Sound Timers
  • Pixel-perfect display (640×320 with PixelSize=10)
  • Loading of .ch8 format ROMs
  • Smooth and stable operation
  • Display of used keys to assist the user
Display

The original CHIP-8 screen is 64×32 pixels.
I chose a PixelSize of 10, resulting in a final image of 640×320, perfectly sharp and faithful to the original.
The Form is sized accordingly (640×400).

Compatible ROMs

The emulator supports all classic CHIP-8 ROMs, such as:
  • Pong
  • Tetris
  • Space Invaders
  • Breakout
  • And many more…


You can find other game ROMs here.
https://github.com/kripod/chip8-roms/tree/master/games

Tests performed

I tested the emulator with several demo and test ROMs, including:
  • Maze.ch8 (diagonal pattern: OK)
  • IBM Logo (correct display)
  • Pong (timers + input: OK)
  • BC_test (opcodes: OK)
Everything works as expected.

Project Objective

This project is primarily a learning exercise, but also a way to rediscover a very elegant little retro system.

The CHIP-8 is perfect for understanding:
  • the architecture of a simple CPU
  • memory management
  • opcode decoding
  • low-level graphics rendering
  • timers and input
Technical presentation (complete architecture)

The goal was to reproduce the exact behavior of the virtual system, including its execution pipeline, memory management, timers, and graphics model.

Internal architecture
Memory

  • Total memory space: 4096 bytes (0x000–0xFFF)
  • ROM loaded from 0x200, according to the historical specification
  • CHIP-8 font hard-coded in the 0x000–0x050 area
  • Byte-addressable memory access, word-aligned instructions (2 bytes)
Registers
  • V0–VF: 16 8-bit registers
  • VF used as a flag (carry, collision, borrow depending on the instruction)
  • I: 16-bit register for memory addresses
  • PC: Program counter, incremented by 2 each cycle
  • SP: Stack pointer
  • Stack: 16-level stack (subroutine returns)
Execution Pipeline
Each CPU cycle follows this pattern:
Fetch:

  • Reads two consecutive bytes from the PC address
  • Constructs the 16-bit opcode: code: opcode = (memory[PC] << 8) | memory[PC+1]
Decode
Extraction of fields:

  • X = (opcode >> 8) & 0x0F
  • Y = (opcode >> 4) & 0x0F
  • N = opcode & 0x000F
  • NN = opcode & 0x00FF
  • NNN = opcode & 0x0FFF
Execute
Execution of the instruction via an optimized Select Case dispatch.

Timers
Decrement of DelayTimer and SoundTimer to 60 Hz.

Graphics Subsystem
Native Resolution

  • 64 × 32 pixels, monochrome
  • Framebuffer: Boolean array or byte, size 2048
  • Final Rendering: 640 × 320 (PixelSize = 10)
Drawing (opcode DXYN)
Reads N sprite lines from memory


    • XOR on the framebuffer
    • Horizontal/vertical wrap (mod 64 / mod 32)
    • Collision detected via VF
    • Redraw only on modified pixels (optimization possible)
Keyboard Management

    • Mapping of the hexadecimal keyboard (0–F) to physical keys
    • Support for FX0A (wait for key) with PC lockout
    • Keyboard state stored in a 16-boolean array
Compatibility

Full support for the classic CHIP-8 instruction set
No Super-CHIP or XO-CHIP (intentional, to remain faithful to the standard)


ROMs tested:

    • Maze (graphics test)
    • IBM Logo
    • Pong
    • Tetris
    • Space Invaders
    • Breakout
    • BC_test (opcode-by-opcode validation)
Technical objectives achieved

    • Faithful implementation of an 8-bit virtual CPU pipeline
    • Memory management compliant with the original specification
    • Robust and readable opcode decoding
    • Pixel-perfect graphics rendering
    • Correctly synchronized timers
    • Functional hexadecimal keyboard
    • Clear, modular, and extensible code structure
Conclusion
This emulator is not a simple exercise:
it is a complete reconstruction of a virtual system, with a CPU pipeline, addressable memory, a framebuffer, independent timers, and a low-level instruction set.

He demonstrates a solid understanding of:

    • retro architectures
    • the inner workings of an interpreter
    • bit manipulation
    • hardware timing
    • low-level memory management
If you are passionate about emulation, retro-computing or minimalist architectures, your feedback is welcome.

Feel free to test, suggest improvements, or ask questions. Happy gaming!
 

Attachments

  • Chip8_Emulator.zip
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